Job Description

Do Something Wonderful!

Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

Who we are:

We are a global team in the Client Graphics and AI organization that drives innovation in CAD solutions to deliver next generation, industry-leading Graphics/AI products for Intel. We constantly push the boundaries of EDA innovation, creating and applying the newest ML/AI design capabilities on the latest process nodes in the industry.

In this position, the candidate will be part of a dynamic, international team responsible for the Tools, Flows and Methodology for the creation of Graphics silicon products. Specifically, the candidate will be part of the horizontal team responsible for creating, owning and supporting implementation flows (floorplanning, synthesis, PnR, ECO) or signoff flows (static timing analysis, quality, formal equivalence) for Graphics products. Candidate will be expected to work independently to understand product needs, create innovative implementation solutions and drive their adoption by working closely with the physical design team. Candidate is expected to liaise with major EDA tool vendors in driving the creation of new tool capabilities for PPA attainment as well support their deployment and usage in production programs at Intel.

Behavior skills we are looking for:

Good communication and interpersonal skills

Strong team player with the ability to work with a large, international team

Ability to work independently and take full responsibility of assigned tasks

Goal oriented and passionate about pushing technical boundaries

Eager to learn and make an impact, willing to challenge the status-quo to come up with out-of-the box solutions

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research and relevant previous job and/or internship experience.

Minimum Qualifications:

Bachelor's degree in Electrical/Computer Engineering, or related STEM degree with 3+ years relevant work experience, or

Master's degree in Electrical/Computer Engineering, or related STEM degree with 1+ years relevant work experience in all of the following:

Strong hands-on understanding and experience of using industry-standard chip design implementation tools such as Fusion Compiler, Genus/Innovus, ICC-DP, as well as Signoff tools such as PrimeTime, StarRC, Formality/Conformal, Redhawk for the creation of high performance designs.

Conceptual understanding of physical design implementation steps and sign-off timing, reliability and quality expectations, needed to optimize high performance designs.

Good scripting experience in Tcl, Python, and/or similar languages.

Preferred Qualifications:

Experiences in taping in products on advanced process nodes

Experiences and knowledge on handling large designs either in implementation or sign off methodology perspective